Probleme ATMEGA16

[Vizitator prigbel]

Salut,Am 2 uC-uri ATMEGA16 si desi sunt aproape noi (am facut cu ele doar cateva teste gen apasat buton si aprins led) am cativa pini care raman pe 1 logic. Asta chiar daca ii spun in program sa ii puna pe 0 sau chiar daca nu are nimic in el (softul sters).De exemplu pinii PORTC5 si 6 sunt pe 1 logic iar restul sunt 0. De mentionat ca nu sunt aceeasi pini cu probleme la ambele uC. Ati mai intalnit asa ceva? Stima.

[danzup]

Salut,

Am 2 uC-uri ATMEGA16 si desi sunt aproape noi (am facut cu ele doar cateva teste gen apasat buton si aprins led) am cativa pini care raman pe 1 logic. Asta chiar daca ii spun in program sa ii puna pe 0 sau chiar daca nu are nimic in el (softul sters).

De exemplu pinii PORTC5 si 6 sunt pe 1 logic iar restul sunt 0.

De mentionat ca nu sunt aceeasi pini cu probleme la ambele uC.

Ati mai intalnit asa ceva?

 

Stima.

Ai citit documentatia , adica pdf-ul lui atmega 16 ?

The alternate pin configuration is as follows:

? TOSC2 ? Port C, Bit 7

TOSC2, Timer Oscillator pin 2: When the AS2 bit in ASSR is set (one) to enable asynchronous

clocking of Timer/Counter2, pin PC7 is disconnected from the port, and becomes the inverting

output of the Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and

the pin can not be used as an I/O pin.

? TOSC1 ? Port C, Bit 6

TOSC1, Timer Oscillator pin 1: When the AS2 bit in ASSR is set (one) to enable asynchronous

clocking of Timer/Counter2, pin PC6 is disconnected from the port, and becomes the input of the

inverting Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and the

pin can not be used as an I/O pin.

? TDI ? Port C, Bit 5

TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or Data Register

(scan chains). When the JTAG interface is enabled, this pin can not be used as an I/O pin.

? TDO ? Port C, Bit 4

TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When

the JTAG interface is enabled, this pin can not be used as an I/O pin.

The TD0 pin is tri-stated unless TAP states that shifts out data are entered.

? TMS ? Port C, Bit 3

TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state

machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

? TCK ? Port C, Bit 2

TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is

enabled, this pin can not be used as an I/O pin.

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Deci cum sunt setati fusebitii ???

[Vizitator prigbel]

Intr-adevar era activat fusebit-ul de la JTAG. Multam.Stima