Vizitator mitumunteanu Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 Tot incerc sa fac o intrerupere externa pe pinul RB0/INT0. Am setat flagurile GIE si INT0IE din registrul INTCON si pinul RB0 l-am declarat ca intrare. Am rulat programul cu un debugger si cand pun pinul RB0 la 5V, in PORTB bitul 0 se pune pe 1(ceea ce e si normal) insa flagul INT0IF din INTCON nu se seteaza. Daca poate sa ma ajute cineva cu aceasta problema ar fi super. Link spre comentariu
costi002 Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 Poate mai trebuie setat și ceva pe la întreruperile periferice, gen PIE. Link spre comentariu
mars01 Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 (editat) Eu zic sa postezi codul asa cum nu iti merge. Pe marginea lui se poate vedea ce se greseste, asa din vorbe ne dam cu parerea ... LE: In datasheet scrie: "For external interrupt events, such as the INT pins or the PORTB input change interrupt, the interrupt latency will be three to four instruction cycles. The exact latency is the same for one or two-cycle instructions. Individual interrupt flag bits are set regardless of the status of their corresponding enable bit or the GIE bit." Adu-ti aminte sa faci un clear la interrupt flag-ul tau in initializare. LLE: pe ce front este setata intreruperea? Pe tranzitie LOW- HI sau HI-LOW? Tu faci tranzitie LOW-HI din cate inteleg ... Bit 6 in INTCON2. Default este pe falling edge adica pe HI to LOW. Editat Decembrie 28, 2015 de mars01 Link spre comentariu
Vizitator mitumunteanu Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 (editat) Codul este scris in assambler: #INCLUDE P18F2550.INC ORG 0000H GOTO start ORG 0008H BCF INTCON,1 RETFIE start: MOVLW 0x01 MOVWF TRISB MOVLW 0x90 MOVWF INTCON BSF INTCON2,6 GOTO $ end; Dupa cum vezi am initializat flagul INT0IF cu 0, iar intreruperea e activa pe frontul crescator, insa tot nu merge Editat Decembrie 28, 2015 de mitumunteanu Link spre comentariu
mars01 Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 (editat) Nu sunt foarte familiar cu assembler-ul dar din cate stiu ordinea setarii bitilor intreruperii este importanta. 1. faci set la bitul 6 din INTCON2. 2. faci clear la bitul 1 din INTCON (adica INTCONbits.INT0IF = 0) 3. muti 0x90 in INTCON (adica INTCONbits.GIE= 1, INTCONbits.INT0IE = 1) Oricum, indiferent daca sunt sau nu sunt activate intreruperile ar trebui sa vezi INTCONbits.INT0IE ca trece din 0 in 1 atunci cand se schimba starea bitului 0 din portul B. Dupa ce intreruperea a fost activata se face clear la INTCONbits.INT0IF din rutina ISR. Am citit candva ca trebuie facuta o citire a portului inainte (era vorba de modul SLEEP si de IoC dar cine stie, poate merge si la tine). Editat Decembrie 28, 2015 de mars01 Link spre comentariu
costi002 Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 Încearcă și cu PEIE =1, nu ai nimic de pierdut. Link spre comentariu
mars01 Postat Decembrie 28, 2015 Partajează Postat Decembrie 28, 2015 (editat) Nu stiu ce problema ai tu dar poate te ajuta urmatoarele. Am facut in XC8 un mic program pentru testare. Cu intreruperea externa INT0 activa, cand bitul B0 al PORTB trece din Low in High se face un toggle la iesirea PORTC bit0. Totul merge foarte bine. Codul este: #include <xc.h>#include <stdint.h>// #pragma config statements should precede project file includes.// Use project enums instead of #define for ON and OFF.// CONFIG1L#pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])#pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)// CONFIG1H#pragma config FOSC = INTOSC_HS // Oscillator Selection bits (Internal oscillator, HS oscillator used by USB (INTHS))#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)// CONFIG2L#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)#pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting 2.05V)#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled)// CONFIG2H#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)// CONFIG3H#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)#pragma config MCLRE = OFF // MCLR Pin Enable bit (RE3 input pin enabled; MCLR pin disabled)// CONFIG4L#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))// CONFIG5L#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)// CONFIG5H#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)// CONFIG6L#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)// CONFIG6H#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)// CONFIG7L#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)// CONFIG7H#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)void __interrupt ISR();void SYS_init();void __interrupt ISR() { if (INTCONbits.INT0IF && INTCONbits.INT0IE) { INTCONbits.INT0IF = 0; LATCbits.LATC0 = !LATCbits.LATC0; }}void SYS_init() { OSCCON = 0x77; TRISBbits.RB0 = 1; LATCbits.LATC0 = 0; TRISCbits.RC0 = 0; INTCONbits.INT0IF = 0; INTCON2bits.INTEDG0 = 1; INTCONbits.INT0IE = 1; INTCONbits.GIE = 1; }void main(void) { SYS_init(); while (1){ } } In asamblare este asa: #include <xc.h>10: #include <stdint.h>11: 12: // #pragma config statements should precede project file includes.13: // Use project enums instead of #define for ON and OFF.14: 15: // CONFIG1L16: #pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))17: #pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])18: #pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)19: 20: // CONFIG1H21: #pragma config FOSC = INTOSC_HS // Oscillator Selection bits (Internal oscillator, HS oscillator used by USB (INTHS))22: #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)23: #pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)24: 25: // CONFIG2L26: #pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)27: #pragma config BOR = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)28: #pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting 2.05V)29: #pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled)30: 31: // CONFIG2H32: #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))33: #pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)34: 35: // CONFIG3H36: #pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)37: #pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)38: #pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)39: #pragma config MCLRE = OFF // MCLR Pin Enable bit (RE3 input pin enabled; MCLR pin disabled)40: 41: // CONFIG4L42: #pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)43: #pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)44: #pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))45: 46: // CONFIG5L47: #pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)48: #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)49: #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)50: #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)51: 52: // CONFIG5H53: #pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)54: #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)55: 56: // CONFIG6L57: #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)58: #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)59: #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)60: #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)61: 62: // CONFIG6H63: #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)64: #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)65: #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)66: 67: // CONFIG7L68: #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)69: #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)70: #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)71: #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)72: 73: // CONFIG7H74: #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)75: 76: void __interrupt ISR();77: void SYS_init();78: 79: void __interrupt ISR() {0008 8202 BSF 0x2, 1, ACCESS0012 0006 POP80: if (INTCONbits.INT0IF && INTCONbits.INT0IE) {0014 B2F2 BTFSC INTCON, 1, ACCESS0016 A8F2 BTFSS INTCON, 4, ACCESS0018 D00C BRA 0x3281: INTCONbits.INT0IF = 0;001A 92F2 BCF INTCON, 1, ACCESS82: LATCbits.LATC0 = !LATCbits.LATC0;001C B08B BTFSC LATC, 0, ACCESS001E D003 BRA 0x260020 6A01 CLRF 0x1, ACCESS0022 2A01 INCF 0x1, F, ACCESS0024 D001 BRA 0x280026 6A01 CLRF 0x1, ACCESS0028 508B MOVF LATC, W, ACCESS002A 1801 XORWF 0x1, W, ACCESS002C 0BFE ANDLW 0xFE002E 1801 XORWF 0x1, W, ACCESS0030 6E8B MOVWF LATC, ACCESS83: }84: }0032 9202 BCF 0x2, 1, ACCESS85: 86: void SYS_init() {87: OSCCON = 0x77;0036 0E77 MOVLW 0x770038 6ED3 MOVWF OSCCON, ACCESS88: TRISBbits.RB0 = 1;003A 8093 BSF TRISB, 0, ACCESS89: LATCbits.LATC0 = 0;003C 908B BCF LATC, 0, ACCESS90: TRISCbits.RC0 = 0; 003E 9094 BCF TRISC, 0, ACCESS91: 92: INTCONbits.INT0IF = 0;0040 92F2 BCF INTCON, 1, ACCESS93: INTCON2bits.INTEDG0 = 1;0042 8CF1 BSF INTCON2, 6, ACCESS94: INTCONbits.INT0IE = 1;0044 88F2 BSF INTCON, 4, ACCESS95: INTCONbits.GIE = 1; 0046 8EF2 BSF INTCON, 7, ACCESS96: }0008 8202 BSF 0x2, 1, ACCESS000A ED09 CALL 0x12, 1000C F000 NOP000E EF25 GOTO 0x4A0010 F000 NOP0048 0C77 RETLW 0x7797: void main(void) {98: SYS_init();0054 EC1B CALL 0x36, 00056 F000 NOP99: 100: while (1){101: 102: } 0058 D7FF BRA 0x58103: } Ai atasata simularea in Proteus 8.3. INT0_interrupt.zip Editat Decembrie 28, 2015 de mars01 Link spre comentariu
Vizitator mitumunteanu Postat Decembrie 29, 2015 Partajează Postat Decembrie 29, 2015 (editat) Am incercat tot ce mi-ati zis: am schimbat oridinea in care configurez bitii, am pus si PEIE pe 1 insa tot nu se seteaza INT0IF cand RB0 trece din 0 in 1. Se poate ca problema sa fie din cauza bitilor de configurare ai controllerului? Editat Decembrie 29, 2015 de mitumunteanu Link spre comentariu
Liviu M Postat Decembrie 29, 2015 Partajează Postat Decembrie 29, 2015 Foloseste un pin pe post de debugger - pune un led pe el si fa-l sa se aprinda si sa se stinga cu o frecventa care sa-ti permita sa-l "vezi". In felul asta te asiguri ca picul e configurat cum trebuie. Link spre comentariu
mars01 Postat Decembrie 29, 2015 Partajează Postat Decembrie 29, 2015 (editat) Ce a spus Liviu trebuie incercat. Este "Hello World" pentru controlere. Mai merita verificat si cu alt controler. Poate este o problema hardware. O chestie ar mai fi ca atunci cand am facut programul de mai sus in XC8 am primit doua atentionari cum ca tine cont de nu stiu ce errata atunci cand genereaza codul. S-ar putea sa te lovesti fix de acest lucru. LE: In erata lui 18F2550 se face referire la ceva probleme cu modulul de intreruperi. Nu am stat sa citesc in detaliu (este o erata destul de mare chiar si pentru Microchip) dar iti recomand sa o faci. Editat Decembrie 29, 2015 de mars01 Link spre comentariu
Vizitator mitumunteanu Postat Decembrie 29, 2015 Partajează Postat Decembrie 29, 2015 Si pentru celelalte linii de intrerupere (INT1 si INT2) am acceasi problema. Flagurile INTxIF nu se seteaza pe front. Link spre comentariu
mars01 Postat Decembrie 29, 2015 Partajează Postat Decembrie 29, 2015 (editat) Acesta este mesajul la compilare: Copyright © 2015 Microchip Technology Inc. License type: Node Configuration :: advisory: (1233) Employing 18F2550 errata work-arounds: :: advisory: (1234) * Corrupted fast interrupt shadow registers Foloseste-te de codul din postul 7. Uite si fisierul .HEX pentru programul scris mai sus. Programeaza-l in PIC si daca functioneaza (la apasarea lui PORTB0 se schimba starea pe PORTC1 (toggle)) atunci probabil ca mai trebuie studiu. test_intrerupere_INT0.X.production.zip Editat Decembrie 29, 2015 de mars01 Link spre comentariu
sosoi Postat Decembrie 30, 2015 Partajează Postat Decembrie 30, 2015 (editat) Nu trebuie initializat pinul ca intrare digitala? Vad ca pe RB0 e AN12 ... cred ca ar trebui adaugate si liniile : MOVLW 0x03MOVWF ADCON1 Editat Decembrie 30, 2015 de sosoi Link spre comentariu
Vizitator mitumunteanu Postat Decembrie 30, 2015 Partajează Postat Decembrie 30, 2015 @mars01: Am programat hex -ul dat de tine si merge, chestia ca nu vad ca tu sa fi facut ceva special in cod. Cat despre initializarea pinilor ca intrari digitale am facut si asta si tot se seteaza flagul ala obosit. Link spre comentariu
Liviu M Postat Decembrie 30, 2015 Partajează Postat Decembrie 30, 2015 Se poate ca problema sa fie din cauza bitilor de configurare ai controllerului? Probabil. Altfel de unde sa stie PIC-ul, de exemplu, ce fel de oscilator folosesti? Ca sa verifici ca-l configurezi bine iti sugerasem testul cu LED-ul. Link spre comentariu
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